研究概要

主要論文

「*」は、理研外のみでの成果です。

• 1.*Tsukada, M, Kondo, M., and Matsutani, H.:
  “OS-ELM-FPGA: An FPGA-Based Online Sequential Unsupervised Anomaly Detector”
  The 16th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar'18). (2018)
  
• 2.*Sakamoto, R., Patki, T., Cao, T., Kondo, M., Inoue, K., Ueda, M., Ellsworth, D., Rountree, B., and Martin Schulz.:
  “Analyzing Resource Trade-offs in Hardware Overprovisioned Supercomputers”
  32nd IEEE International Parallel & Distributed Processing Symposium (IPDPS2018), 10 pages. (2018).
  
• 3.*Wada, Y., He, Y., Cao, T., and Kondo, M.:
  “A Power Management Framework with Simple DSL for Automatic Power-Performance Optimization on Power-Constrained HPC Systems”
  SupercomputingAsia 2018 (SCA18), 20 pages. (2018).
• 4.*Shresthamali, S., Kondo, M., and Nakamura, H.:
  “Adaptive Power Management in Solar Energy Harvesting Sensor Node using Reinforcement Learning”
  ACM Transactions on Embedded Computing Systems, Vol.16, No.5s, pp.181:1-181:21. (2017).
• 5.*Sakamoto, R., Takata, R., Ishii, J., Kondo, M., Nakamura, H., Ohkubo, T., Kojima, T., and Amano, H.:
  “The Design and Implementation of Scalable Deep Neural Network Accelerator Cores”
  IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-17), 8 pages. (2017).
• 6.*Sakamoto, R., Cao, T., Kondo, M., Inoue, K., Ueda, M., Patki, T., Ellsworth, D., Rountree, B., and Schulz, M.:
  “Production Hardware Overprovisioning: Real-world Performance Optimization using an Extensible Power-aware Resource Management Framework”
  31st IEEE International Parallel & Distributed Processing Symposium (IPDPS2017). 10 pages. (2017).
• 7.*Cao, T., Huang, W., He, Y., and Kondo, M.:
  “Cooling-Aware Job Scheduling and Node Allocation for Overprovisioned HPC Systems”
  31st IEEE International Parallel & Distributed Processing Symposium (IPDPS2017), 10pages. (2017).
• 8.*Ohkubo, T., Tanaka, T., Sakamoto, T., Kondo, M., and Amano, H.:
  “NAMACHA: A Software Development Environment for a Multi-Chip Convolutional Network Accelerator”
  32nd International Conference on Computers and Their Applications (CATA'17). (2017).
• 9.*He, Y., Kondo, M., Nakada, T., Sasaki, H., Miwa, S., and Nakamura, H.:
  “A Runtime Multi-Optimization Framework to Realize Energy Efficient Networks-on-Chip”
  IEICE Transactions on Information and Systems, Vol.E99-D, No.12, pp.2881-2890. (2016).
• 10.*Inadomi, Y., Patki, T., Inoue, K., Aoyagi, M., Rountree, B., Schulz, M., Lowenthal, D., Wada, Y., Fukazawa, K., Ueda, M., Kondo, M., and Miyoshi, I.:
  “Analyzing and Mitigating the Impact of Manufacturing Variability in Power-Constrained Supercomputing”
  The International Conference for High Performance Computing, Networking, Storage and Analysis (SC15), 2 pages. (2015)

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研究員または特別研究員募集（R-CCS2323）	ポストが決まり次第

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